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how can decide slew rate and ICMR of error amplifier in LDO

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analog_cmos

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Hi
How can i choose ICMR range of error amplifier.It should be depend upon this equation vin(min)>= Vref+Vsd+Vds correct or not(i used N type 2 stage opamp at 1.8 V supply)??
suppose in my design Vin(min) is 1.5V so my ICMRmax could be less then 1.5V but how can i choose ICMRmin ??
For error amp slew rate depend upon pass transistor driving voltage at specified settle time . from maximum to minimum Load current ,Cpar also vary .how can i choose proper slew rate. please give me some valuable suggestion.
 

Re: how can decide slew rate and ICMR of error amplifier in

I think you are looking at the wrong way.

What are the specs.

Slew rate will come from your settling spec.
input common-mode range will come from what output and input specs you have. Typically Vref will be some Bandgap voltage say 1.25V so design your input stage based on that.
 

Re: how can decide slew rate and ICMR of error amplifier in

Hi
Thanks for reply me. For slew rate issue if i choose settling time of LDO initially suppose 2us, should this also settling time of error amplifier ??.For ICMR should in between 1.25 V, 1.1 to 1.4 V, is it correct?? i am waiting for yours reply.
 

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