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Challenging projects using Verilog/SystemC

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Hi Guys,

I am trying to work on some design/verification projects involving Verilog/SystemC. What are some challenging projects that I can try to work on that will utilize Verilog/SystemC? Could ARM Soc implementation and verification be regarded as a challenging project?

Any suggestions are greatly appreciated.

Thanks.
 

Thanks.

Here are some verification projects that I plan to do:

Bus protocols: USB, AXI, PCI-E,SAS,SATA,Fibre channel, SCSI
SOC: ARM, DSP SOC which other SOC's should I try to verify?

Do I need IP's for the above to write verification suites for them?

Are there any open source IP's of SoC's that I can use for verification?

Please excuse my stupid questions as I am a newbie at this and trying to learn.

My plan is to use Xilinx ISE to develop Verilog verification for the above and use ModelSim to simulate it. Will that work?

Thanks for your patience.
 

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