question concerning integrator design

Hello,

I am designing an itegrator I used the ideal model of opamp on spice which is E(name) out1 out2 inp inn. The op_amp negative node is connected to feedback capacitance and a shunt switch and the postive is connected to refrence voltage. But I have a problem, when I draw the voltage on the postive terminal it's equal to the refrence voltage when switch is closed only and it's not equal to the refrence voltage when the the switch is opened ( when the system is integrating).Notice that i am integrating dc current which is equal to 18u. Do any one know the reason?

Thanks alot

I am afraid the circuit is wrong.
How do you realize the integration time constant (T=RC) ?

I treid connecting a sereis resistance to the current source.So that the input current passes through a sereis resistor then the series resistor is connected to the negative input of the op amp but i had the same results.My problem is that the negative terminal voltage is not equale to the postive one (refrence voltage) when the switch is closed(parallel to the feedback capacitor).and i am using an ideal op_amp model.So I don't know the reason for that!!!! and I am using hspice.

Thanks alot.

Question 1:
What do you want to integrate? A current or a voltage ?
Question 2:
What is the purpose of the "reference voltage"?

Recommendation: Show the circuit diagram and explain your design goal.

I want to integrate dc current in a range between 18u and 20u. The refrence voltage has no importance when using the ideal op_amp. But if used an op_amp that i designed by my self it will represent the common mode voltage at which my circuit is working.Notice that I first used a telescopic op_amp that I designed by my self but when it didn't work I used an ideal op_amp model to test the concept of integrating a dc input current but I got the same results. In both cases the negative terminal voltage of the op_amp is not equal to the postive one if a feedbach element is connected(Notice that the two terminals are equale in the case of unity feedback).

Any way this integrator will be used in a single slope analoge to digital converter that will convert input is a dc current between 18 u and 20 u.

Cload =1p and Cfb=100p and I have to use this big feedback capacitor in order to reach resonable vout in suitable time. My desisgned op-amp gain =66db, phm=65 deg.

Thanks

In principle, you don't need a series resistance with a current source.

But it can't be seen from your diagram, why the circuit shouldn't work. Of course the input common mode range must be kept,
also the zero voltage difference between +ve and -ve input can be only maintained, as long as the output voltage is in the OP's linear
output voltage range. With Cfb of 100 pF and 18 uA current, output saturation is reached within a few 10 us and the input
voltage starts to drift away. Usual slope converters have a factor 100 or 1000 higher feedback capacitance.