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help: what's this layout error

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nozone

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layout density problem site:edaboard.com

a simple inverter, but I got a Diva DRC error:

LAT.3N P-well pickup OD to NMOS space > 30 um
LAT.3P N-well pickup OD to PMOS space > 30 um

who can help me to fix it, I'm using the TSMC 0.18 Mixed-signal CMOS

Waiting for any input

thx,
 

pickup od to nmos space

Distance between contact to PWELL and NMOS transistor, contact to NWELL and PMOS transistor less than 30 um. This rule prevent latch up. If your layout is a simple inverter I guess you have no contacts to PWELL and NWELL at all.
 

layout.error

Thanks for your reply, fom, however there is no contact at all, just two pcells of PMOS and NMOS. and i got the same error in both calibre and diva DRC, and in calibe we also got some metal density problem, since there is no layout yet, I guess maybe we can ignore them.

I just fixed the lat error, i just need to place a m1_sub contact and connect it to a metal1, then the error will be gone.
 

layout error

Usually this is solved by putting vdd and vss connections in their appropriate p-plus and n-plus/nwell regions near the devices. Just putting two devices results in a floating circuit. You need some power source.

I hope i have understood the problem correctly. But try this out and let us know what happened.
 

layout transistor od what is?

yes, uncle_urfi, that's the best way to fix it. I want to say thanks to you but I can't, sorry
 

3n lat

For digital circuit,maybe you can ignor this(such as sram).
 

p-well pick-up to nmos max space

LAT.3N P-well pickup OD to NMOS space > 30 um

Connect substrate to GND to do that put M1_SUB in the blank spaces and connect them to GND with metal 1.

LAT.3P N-well pickup OD to PMOS space > 30 um

Connect N-WELL of PMOS to its source to do this put M1_NWELL and connect to its PMOS's source (or VDD).


Put M1_SUB contacts as many as possible to different places in layout so that the substrate noise will be reduced. Make sure to put them in an array not just a single contact to reduce the resistance.

P.S.: Very late answer :p but just saw the topic. Solution may be useful for somebody else.
 

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