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Startup circuit for PTAT current reference

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calculus_cuthbert

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Hi,

Could someone please explain why start up circuit is needed for a seld biased (bootstrapped) PTAT current reference?

And I would really appreciate it if someone could give me a schematic of a start up circuit for the above.

Thanks.
 

As for "Why?", presumably your circuit needs to work every time.
Counting on some specific supply risetime, some leakage, etc.
is a poor bet against a universe of mischief.

The general theme for startup is, apply a bias to one of the legs
that gets enough current flowing to enter the regenerative
region of operation, but one that is enough below the normal
"locked in" operating point to not add significant error.
This could be time-switched, diode-steered, etc. depending
on what else is going on, constraints on standby current vs.
complexity etc.
 
A PTAT current reference circuit is based on the concept of adding (subtracting) vbe voltages. Typically you would use two vbe voltages with different areas and a resistor closing the loop to put the PTAT voltage across it. Such a circuit has two stable Operating Points, one of them is with every voltage equal to zero, the other one is the desired one. You need a startup circuit to prevent the undesired OP.

I hope it helps ;-)
 

Hi calculus_cuthbert,

It is attached an example to illustrate better the concept.

If a current equal to zero situation occur in the PTAT circuit (wrong operation point), probably the gate of M1 will be equal to VDD, and gate of M3 will be around zero.
In this case, M13 is off, and M12 is on.
This will force gate of M1 down, what accordingly will inject current in the loop.
After this... the gate of M3 will be high (normal value), what will turn on M13,
and consequently decreasing the voltage at the gate of M12 - turning off this device; and isolating the start-up circuit.

let me know if it is not clear.
 
Thanks everyone for the suggestions and comments.

I have attached a schematic of the PTAT current reference and start up circuit that I designing.

One problem that I am facing is that the positive slope of the currents ID1 and ID2 are different. Shouldn't the slopes be the same?

The current ID1 is Vtln(n)/R1

If R1 = R2 I would expect the slopes of the currents ID1 and ID2 to be the same. I am designing the slope in such a way that the GBW of the opamp block remains constant with temperature. I am using the PTAT current reference and mirroring the current in a two stage opamp as the tail current source.

I need the slopes to be the same so that I can accurately compensate for the loss of speed at higher temperatures.

Could someone tell me what I should do to make the slopes equal? and also why are the slopes unequal.
 

HI calculus_cuthbert,

The slopes of ID1 and ID2 will be the same only if the aspect ratio of the PMOS - that are supplying the currents - are exactly equal.

For example, if ID1 is equal to a value X, and ID2 is equal to a value 10*X, the slope (TC2 = temperature coefficient) of ID2 will be 10*TC1.

If ID1 is equal to ID2, the slopes must be equal!

Best regards,
 
Thanks Palmeiras,

Yes I think the aspect ratios were different. I guess my understanding was the the temperature coefficient should be same no matter what the aspect ratios were. So they would just be parallel lines having the same slope.

So I had another question regarding the slope of the PTAT current source. How does one calculate what slope is needed for the temperature compensation.

So I have a two stage opamp block and the GBW = gm/(2piCc) where Cc is the compensation capacitor. Could you please let me know if my understanding is correct.

So If I sweep temperature and measure the GBW. I would get a negative temperature corfficient i.e the GBW would increase with decrease in temp and viceversa.

So once I get the negative slope of the GBW, would I use that to calculate how much slope I need for the PTAT current source?

Also gm = sqrt(2KId) which means that the slope of the PTAT current should follow a square law to compensate for the gm.

Is this correct? If not could you please explain how I should calculate the slope for the PTAT?

Thanks
 

calculus_cuthbert said:
I guess my understanding was the the temperature coefficient should be same no matter what the aspect ratios were. So they would just be parallel lines having the same slope.

I'm with you there, I think aspect ratio should not be the issue. I'd rather check the two NMOS closing the loop, not sure I like that way of making the PTAT source, is that a standard way of doing it?

calculus_cuthbert said:
So I had another question regarding the slope of the PTAT current source. How does one calculate what slope is needed for the temperature compensation.

You don't really control the slope of the PTAT source, the slope should always be the temperature. Of course, the only real PTAT thing you have is the voltage, since you are putting this across an internal resistor with high TC, you see the resistor TC in the slope and also the PMOS TCs.

If you need a different slope, then you don't want a PTAT source, instead you need a bandgap block which is the same but adding to the PTAT voltage a vbe voltage with a given factor so you can create any slope you like
 

The aspect ratio is not really an issue. But for sure, it affects the TC of the output current. A simple example. Please, consider again: ID1 equal to `X`, and ID2 equal to `10*X`. In another words, the aspect ratio is S1/S2 = 10. Consider now that each 1 degree celcius causes an increase of ID1 increase by `Y`. So the TC1 is Y/degrees. Due to the current mirror gain, for 1 degree of change in ID1, ID2 changes by 1*10 = 10. Therefore, if you consider that TC = deltaID/deltaTEMP, for the same change in the temperature, the variation in ID2 is 10 times bigger. Then, TC2 = 10*TC1.

Added after 2 hours 5 minutes:

Hi!

Regarding the slope... you dont need to be worry about it.
The advantage of this circuit is to provide gm constant.
The transconductance of one NMOS biased with a copy of the PTAT Current - through a current mirror - will be proportional ( or equal) to gm of the device in the internal loop of the PTAT circuit. It will be constant over the temperature range.
Because this..... the GBW of your circuit will be also constant.
This consideration neglects the temperature coefficient of the resistor; when the transconductance is inversely proportional to the resistance.
Moreover, usually this circuit is used with an external resistor. In such way, you can guarantee the desired gm. Otherwise, variation of until 20% in the value of the resistor will change the designed gm.

This is my point of view. Lets discuss.

Best wishes,
 

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