supaviter
Newbie level 3
Please HELP!!!
hello! i m making my project on implementation of DCT using VHDL. In this i have done my coding in structural modeling for Data sequence up to N=16 point DCT. But my whole coding is in real. i.e. real I/P, real computation and real O/P. due to this problem my code is not synthesizable as I/p and O/p both shuld be in binary form....so, can any 1 suggest me what 2 do, to make my Whole program synthesizable without taking much time as i m left with only 2 weeks for my final project completion!!!! PLease HELP!!!!
hello! i m making my project on implementation of DCT using VHDL. In this i have done my coding in structural modeling for Data sequence up to N=16 point DCT. But my whole coding is in real. i.e. real I/P, real computation and real O/P. due to this problem my code is not synthesizable as I/p and O/p both shuld be in binary form....so, can any 1 suggest me what 2 do, to make my Whole program synthesizable without taking much time as i m left with only 2 weeks for my final project completion!!!! PLease HELP!!!!