4017 divider for synthesizer

i want to design a divider 4 an integer n synthesizer that sweep between 1MHz to 5MHz . i want to use a 4017 chip as divider.this synthesizer must have 100kHz resolution.i dont know how to desin this divider?

Try looking up the datasheet for CD4017 : **broken link removed**

Here is a simple reference schematic: **broken link removed**

The output frequency on any output pin will be directly proportional to the input clock frequency (from the 555 timer). The output frequency will be the clock frequency divided by 10.

If you are trying to come up with a frequency synthesizer controlled in an analog fashion, you can just vary the 555 timer frequency.

But from your question, it seems you need a digital control. I will post it later to this thread.

Sorry... I did not read the divider part.

In that case, to divide the frequency, just use your PLL output frequency as the Clock input to the CD4017... you will get a divide-by-10 output from any output pin of the 4017.

Connect the 'Decoded Output 0' of the CD4017 to the PLL comparator Input line. And also connect one of the 'Decoded Output x' (where x is 1 to 9) lines of the CD4017 back to the CD4017 Reset pin. Here x corresponds to the divider you want (since we reset the CD4017 count every time we reach the particular count and we provide the signal as input to the PLL). You may choose to use a mux to connect the decode lines to the reset pin.


Hope this helps (Please try drawing this out and do a small feasibility study to find out if this suits your project... This is just a random idea).

Added after 3 minutes:

Also note that in the above case we are just providing a divide by N for the PLL.