curious_engineer
Junior Member level 2
I am getting clearance DRC errors on a part in layout (a 68pin package), some of which are independent of my routing (the vias in the package design are too close apparently), as shown in the image below. I am also getting routing clearance errors.
The reason why this is unexplainable as far as I know is because I am using this exact part from a previous DRC-free design, and I am using the same DRC rules file that the other design had. So it makes no sense to me that mine would show DRC errors while the original doesn't. Also, the routing wires are 0.008in in width, the same wire width used for routing this part in the previous design, yet I am getting clearance issues here too.
Can anyone help? I am baffled, and I have asked a few designers and they are completely clueless as well. Is there some setting that may have changed that I am unaware of (the DRC settings are identical)?
The reason why this is unexplainable as far as I know is because I am using this exact part from a previous DRC-free design, and I am using the same DRC rules file that the other design had. So it makes no sense to me that mine would show DRC errors while the original doesn't. Also, the routing wires are 0.008in in width, the same wire width used for routing this part in the previous design, yet I am getting clearance issues here too.
Can anyone help? I am baffled, and I have asked a few designers and they are completely clueless as well. Is there some setting that may have changed that I am unaware of (the DRC settings are identical)?