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How to reduce an offset in Op-Amp?

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steadymind

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Hi, i am trying out a simple op-amp (pmos input diff pair followed by a pmos source follower)

I find that the offset is very high. any ways to reduce the offset ?
I know why this offset occurs but dont know how to overcome it.
 

Re: Offset in Op-amp

thanks erikl for the pdf.
 

Offset in Op-amp

Is it a systematic or random offset? How large is the offset and what is your specification?

Keith
 

Re: Offset in Op-amp

the systematic offset in worst case is 2mV).

my total spec for offset is 10mV ( systematic + random) which i will exceed if my systematic is this high.

i dont want to implement a chopped one.

CM for input and output is 0.8 to 1.3 , gain > 40dB.

the intended use of this opamp is for a band-gap buffer and generate bias voltages.
 

Offset in Op-amp

You should be able to eliminate the systematic offset by sizing correctly. The random offset can be improved by increasing transistor sizes. It might be useful to post your circuit (with sizes)

Keith
 

    S

    steadymind

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Re: Offset in Op-amp

in the schematic attached i have to drive a 1-10M resistor, and also intend to use the firststage diff-pair as an unity gain op-amp to drive capacitive loads..

i find the offset is high for both these configurations.

the vdsat of input pair is about 120mV, gain = 45dB but offset is 2mV :(
 

Offset in Op-amp

You designed an offset into it. The current in M12 must be the same as in M13 when the input is balanced otherwise you have an offset.
 

Re: Offset in Op-amp

i dont think that should matter, i dont have a slew rate spec, so i just use a nominal current in the buffer stack.. what is ur reasoning behind this...

i will simulate having m12 and m13 to be equal and let u know the results.
 

Re: Offset in Op-amp

How have you measured the systematic offset?
This diff stage is highly asymmetric and has a low open loop gain. If the value of vout is not exactly vfb without feedback you need a small diff-voltage at the input to drive vout to the value of vfb. The higher the gain of your ota is the smaller is the needed diff-voltage at the input.
 

Offset in Op-amp

As already said, the circuit is asymmetric although I don't think M12/M13 sizing is the problem.

Zero volts in will produce a voltage on M47 drain equal to M1 drain (and hence M1/M47 gate). Your output voltage will then be Vgs of M13 above that. So, zero volts in will produce a voltage roughly 2*Vgs above ground. I don't think sizing will get rid of that. You stand a better chance by using an NMOS common source for M13 and therefore having more gain as well. You will be able to tweak the systematic offset then by sizing of the output transistors.

For the random offset, you need to consider the sizes. In the process specification there should be matching data for the MOSFETs. Using that information you can choose the maximum offset provided it doesn't slow the amplifier down too much.

Keith.
 

Re: Offset in Op-amp

The sizing of Mosfets is only okay if you know what you do and if you get a feedback from the simulator. Your only chance to keep your spec is to analyse with Monte Carlo the random offset.
Systematic offset is a question of loop gain and sizing. Random offset is a technology problem and is modeled on statistics which are used in Monte Carlo analysis.
 

Re: Offset in Op-amp

chippendale said:
The sizing of Mosfets is only okay if you know what you do and if you get a feedback from the simulator. Your only chance to keep your spec is to analyse with Monte Carlo the random offset.
Systematic offset is a question of loop gain and sizing. Random offset is a technology problem and is modeled on statistics which are used in Monte Carlo analysis.
Click to expand...

I don't think the systematic offset of this design can be fixed by sizing.

You can estimate the required sizes for a given random offset random with the matching information for the process before doing a Monte Carlo analysis. It is quicker to design it than repeatedly do Monte Carlo runs to find the required sizes.

Keith.

Added after 8 minutes:

keith1200rs said:
I don't think the systematic offset of this design can be fixed by sizing.
Click to expand...

Actually, that is probably not strictly true, if you deliberately mis-sized M54/M0 or M1/M47 you could shift the voltage on the gate of M13 for zero input voltage to one Vgs below mid rail. However, As you then wouldn't have equal sized input or mirror transistors, I dread to think what will happen to the random variations! I wouldn't recommend it.

Keith.
 

Re: Offset in Op-amp

The effect of a systematic offset is

1. Defined by the topology symmetry
2. Depending on symmetric sizing

The OpAmp here have a differential, a symmetric topology part, input. But an asymmetric output. So from the topology standpoint somewhere in the amplification path there should be a topology transistion from symmetric to asymmetric. If the gain path is symmetric there exist no systematic offset. Depending on how much gain you have at the transitition from symmetric to asymmetric the systematic offset varies.

In your schematic the transition is direct after the differential input pair. So the drain voltage of M0 directly follows vout.

Typical two stage opamps set the transition point one stage later. That could be done by changing M13 to NMOS. As figured out above the Vdsat of M13 should be equal to Vdsat of M1.
 

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    steadymind

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Re: Offset in Op-amp

Oops did not even notice the PMOS. To reduce the offset using this configuration is not easy. Either make in a standard two stage opamp, or keep your concept in reverse.
 

Re: Offset in Op-amp

thanks guys,

as rfsystem says if i have a single ended output, i will create an asymmetry in the system and have offset...... i guess i have to live with it..
 

Re: Offset in Op-amp

steadymind said:
thanks guys,

as rfsystem says if i have a single ended output, i will create an asymmetry in the system and have offset...... i guess i have to live with it..
Click to expand...

Not quite correct. Some asymmetry is inevitable when going from differential to single ended, but frankliner has suggested one way to fix it and I suggested another (same thing as frankliner but upside down) both of which will allow you to reduce the systematic offset to zero.

Keith.
 

Re: Offset in Op-amp

When I see the circuit of frankliner I ask me how this will work. Current sink with pmos diff pair?!
 

Offset in Op-amp

You are right. I think the diff pair transistors are supposed to be NMOS - the arrows are the wrong way round (and therefore bulk connection also wrong).

Keith.
 

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