a.akbari61
Junior Member level 3
Hi everybody
I want to plot clock-to-output delay for a D type flip flop versus input-to-clock offset in cadence to measure flip-flop setup and hold time.
something like attached picture.
In fact I don't know how to sweep the delay between occurrence of the edge of data and clock signals in cadence. I use spectre for simulation.
Could anyone help me plz. I have few time to prepare this figure!
Thanks in advance.
I want to plot clock-to-output delay for a D type flip flop versus input-to-clock offset in cadence to measure flip-flop setup and hold time.
something like attached picture.
In fact I don't know how to sweep the delay between occurrence of the edge of data and clock signals in cadence. I use spectre for simulation.
Could anyone help me plz. I have few time to prepare this figure!
Thanks in advance.
