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  1. #1
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    CLASS C- Tuned Amplifer design

    Hi,

    I was working on simulating Class C Amplifier and was able to understand and simulate "A common-emitter class C amplifier with a resistive load biased below cut-off with a negative supply. " Here we get the output waveform only when the input voltage is greater than the the negative voltage across base and the base to emitter drop 0.7V

    Now I am trying to simulate "CLAMPER BIAS FOR A CLASS C Tuned AMPLIFIER".

    I understand from theory that on adding a tuned tank circuit in collector side, I can get the output even during non conduction times of Transistor due to generation of output by the action of Tuned tank circuit. I am not able to implement this theory.
    Can anyone help me with calculations involved in designing such a circuit? What should be values of L and C and where to place the collector resistor to maintain the proper biasing of transistor- series or in parallel with tuned circuit? Please help me the understanding of the design

    To help you understand/refresh some basics of Class C amplifier I am attaching some useful notes.

    Thanks a lot for the help!
    -Hemanshu

    •   Alt9th March 2010, 18:36

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    Re: CLASS C- Tuned Amplifer design

    The reference design is total nonsense, forget it now!

    The idea of class C is that you drive the transistor between two states, completely shut off and fully saturated. Obviously you get extremely high distortion when you do this but you don't use class C in linear applications anyway. In both states the power dissipated in the transistor is close to zero, in the off condition Ic is zero and in the on condition Vc is zero (it's really VCEsat but that's very small). As the transistor dissipates Vc * Ic Watts, in both cases it is almost nothing. Power is only wasted during the transition from on to off and back again.

    If you ran it in class B, in other words with zero bias, there would be a longer rise and fall period during the cycle. During these periods the transistor would be partially conducting and generating heat.

    In class C you deliberately force the transistor to be off until the input cycle exceeds the transistors Vbe and the reverse bias voltage you apply. This discharges the base capacitance quicker and also reduces the portion of cycle in which the transistor conducts. Essentially, you get a faster turn-on and faster turn off so the transistor spend less time partially conducting and keeps cooler.

    Now the problem is the collector voltage/current is no longer anything like the input waveform, it is distorted to a square(ish) wave, typically only one third of the original input cycle appears at the output and it abruptly changes from zero to supply voltage. This is where the tuned circuit come in to play.

    If you parallel a capacitor and an inductor you form a tuned circuit. If you pulse a voltage across a tuned circuit, it oscillates as magnetic fields in the inductor and electrostatic fields in the capacitor transfer energy to each other. The constant square wave pulsing from the transistor maintains the oscillation to produce your output waveform.

    As for signal biasing, forget the rest of the transistor and just consider the base to emitter junction. It behaves like a diode and rectifies the signal, charging the capacitor as it does so. The resulting voltage is the the reverse bias needed to keep the transistor in class C condition. You can still provide your own voltage as well of course and most amplifier designs do just that.

    Brian.


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    Re: CLASS C- Tuned Amplifer design

    @betwixt

    Thanks for a detailed reply... It has definitely boosted my understanding but I am still struggling to make the design work on pspice. Well I have found something over internet and trying to design accordingly.

    Meanwhile if you can help me suggest the design parameters( I want to see the resonant action of LC circuit working during non conduction states of transistor) that would be great. Any help is appreciated...

    Thanks again!

    -Hemanshu



    •   Alt10th March 2010, 15:34

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    Re: CLASS C- Tuned Amplifer design

    I'm afraid I do not have pspice here. I rarely use simulation tools - I'm one of a dying breed of engineers that still work things out the hard way with a calculator, pen and paper!

    To see the effect of the tuned circuit resonating, just simulate a parallel LC circuit and connect DC across it. Ignore that fact that the coil might smoke! now remove the DC and you should see a decaying sine wave at resonant frequency.

    All the transistor does in the class C amplifier is pulse voltage across the LC circuit at signal frequency. It 'kicks' the oscillation back into life every cycle before it has time to decay away.

    Brian.



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    Re: CLASS C- Tuned Amplifer design

    Hi Brian,

    I worked on the design and I think its working now for both series and parallel resonant circuit. Please see the attachment.

    What I have done is that I am pulsating the base of transistor at a frequency very near to resonant frequency of the series/parallel resonant circuit. This tuning needs to be checked very carefully otherwise we may not get the desired waveforms.

    If possible could you please just look into what I have done.

    Basically during the ON state the Inductor charges and in the OFF stage with help of capacitor and resistor it delivers the output current.
    Waveform across capacitor can be explained on the basis of whether it is in series or parallel configuration.

    Thanks for your support man!
    Any more thought/ideas/corrections are welcomed!

    -Hemanshu



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    Re: CLASS C- Tuned Amplifer design

    That looks good to me.

    In commercial amplifiers the drive signal and the resonant frequency of the tuned circuit are the same and the duration of the current pulse through the transistor depends on how far you bias it OUT of conduction. Remember that as the bias is increased, it tends to stop the transistor conducting until the drive signal has reached further up it's cycle so the conduction period is shorter.

    Here's something to consider - it is another factor that isn't mentioned but happens in real life:

    Ideally the impedance between supply and ground is zero Ohms. Also assume (although it isn't technically true) that the transistor has zero impedance when it is fully saturated. You have a short circuit across the tuned circuit so it cannot possibly 'ring' or resonate at all !!!

    You will find in practice that the waveform is not a perfect sine, the effect of shorting out the LC circuit during transistor conduction will cause some distortion although it probably wouldn't cause problems in real life. In fact the output oscillation only starts as the transistor turns off. It might be interesting to run a frequency spectrum analysis on the output, making sure it ran to at least 4 times the input frequency to see what really comes out.

    Brian.



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    CLASS C- Tuned Amplifer design

    Yeah I have to see the Frequency spectrum also.. I will work on harmomics and distortion and will post once done



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