kumar33
Newbie level 5
Hi all,
I'm working on AES implemtation in FPGA. I need to send Encrypted data's to DSP (or FFT/IFFT) through SPI port.
I have written SPI controller module in verilog. I want to know to how to calculate Set-up / Hold time to interface with DSP board SPI peripherals.?. On What basis we have to write Timing Constraints ?
Kindly help me.
Thanks,
Kumar.
I'm working on AES implemtation in FPGA. I need to send Encrypted data's to DSP (or FFT/IFFT) through SPI port.
I have written SPI controller module in verilog. I want to know to how to calculate Set-up / Hold time to interface with DSP board SPI peripherals.?. On What basis we have to write Timing Constraints ?
Kindly help me.
Thanks,
Kumar.