why altium doesn't have a constraint manager like allegro's?

hi

in the past few years, there was a lot of development in altium designer, but somehow they never implemented a constraint manager like the cadence allegro's constraints manager. once i asked altium tech support, and they just didnt understand what i was talking about. without this feature, it is impossible to design for example a computer board with intel or amd chipset, or a DDR3 memory down layout with any processor/FPGA.

why is that?

(the allegro CM lets us to define length segments on multipoint nets based on predefined pin-pairs or all-pin-pairs not only a total-net length like altium supports, it lets us to define length matching based on predefined-pinpairs or all-pin-pairs, package lengths for large BGAs, all these in aspresdsheet interface with live feedback...)

Re: why altium doesn't have a constraint manager like allegr

I have used Allegro for some 5 years now and would say that this CM is much much to difficult for many to jump into. It is good, near perfect, but a very very complex tool.

Last august i started to look at Altium, and find the way they do it more gently.

I just started do my little atom board in Altium, and i do have some struggles now and then, but it is possible.

how would you do a DDR2/3 memory down address bus for the chipset based on JESD21C in Altium?
are there pin-to-pin rules in Altium? 2 years ago when i used altium, they didnt have it, i think.

which altium version are you running?
you can set this up in the design rules. It may not be as nice as in allegro, but then altium is about 5 times cheaper then allegro.

"you can set this up in the design rules"
but where exactly?
i used the net length rule, but it is not sufficient for complex topologies.