bekirhakan
Newbie level 3
using time delay
Hi everybody...
I have a guestion. I want to produce time delay using
VHDL. If the input signal rises '1' from '0' , the output signal
must rise '1' from '0' after 5 seconds. If the input signal
falls '0' from '1' , the output signal must fall '0' from '1' after
5 seconds. How can I produce this time delay ? if you help me,
you will make me happy.
Thanks in advance...
Hi everybody...
I have a guestion. I want to produce time delay using
VHDL. If the input signal rises '1' from '0' , the output signal
must rise '1' from '0' after 5 seconds. If the input signal
falls '0' from '1' , the output signal must fall '0' from '1' after
5 seconds. How can I produce this time delay ? if you help me,
you will make me happy.
Thanks in advance...