omara007
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Nested FSM states
Hi folks
What is the best way to code nested FSM states in VHDL ? .. i.e. when we have a parent state (say X) that has more than one child states (say Y,Z, etc) that are all encapsulated inside it.
Hi folks
What is the best way to code nested FSM states in VHDL ? .. i.e. when we have a parent state (say X) that has more than one child states (say Y,Z, etc) that are all encapsulated inside it.