Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Simulink IIR filter on FPGA

Status
Not open for further replies.
F

FlyMysticalDJ

Newbie level 1
Joined
Dec 4, 2009
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,289
I made a filter with simulink and used one of its tools to create vhdl code out of it. I implemented it on an FPGA and it gives me reasonable output except that the frequencies that it pass are not the frequency I designed it to pass. When testing in matlab, a FFT of the output from the filter gives a single peak at 82Hz, but the filter on the board passes 56Hz as well at 170Hz. Any idea what would cause this? Thanks for the help.
 

r u checking your output using hardware co-simulation in loop??
Can you tell me more about input signal BW, BFP characteristcs, sampling frequency etc.,

-- Ashwini
 

hi !
can u tell me how to implement simulink based design in FPGA kit ...
please i have designed a receiver i need to implement in FPGA kit.. please help me
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top