Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

analyzing spurious transition power

Status
Not open for further replies.

dpriemens

Newbie level 1
Joined
Nov 6, 2009
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
The Netherlands
Activity points
1,288
Hi,
I am comparing a number of arithmetic adders based on their power consumption. I use Synopsys Design Compiler for synthesis and Prime Time PX for power analysis (using back annotated SAIF files, from simulation in ModelSim).

I can't figure out if the Synopsys tools are actually analyzing the power that is dissipated due to spurious transitions as well.

Does anyone know if and how it is possible to analyze spurious transistions in Synopsys DC/PT? Or is this only possible in a tool such as SPICE?

I am really hoping someone can help me out here. Thanks a lot.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top