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low-voltage CMOS negative impedance converter

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Shlapenka

Shlapenka

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Help needed

Hello everyone :)

Here's my problem: I am making a low-voltage CMOS negative impedance converter for analogue filter applications.

here is the scheme: **broken link removed**

I made transistors with these 0.35 um models : https://www.mosis.com/cgi-bin/cgiwrap/umosis/swp/params/ibm-035/t3bl-params.txt

I dont realy understand the purpose of V6 and V7 (they are bias, dont understand what that means)... What their values should be? And what use does Vdd have?

Tyvm for your answers!
 

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