Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Hardware Software co-verification methodology issue ?

Status
Not open for further replies.

leeguoxian

Member level 3
Joined
Jun 20, 2006
Messages
66
Helped
6
Reputation
12
Reaction score
2
Trophy points
1,288
Activity points
1,778
Dear All :

I'm verifying a SoC with a 8051 IP core . And during the top level verification , I'm confused about how to co-verify with hardware and software !

For example, I want to test the gpio function . Then I wrote the test program . But I need to drive the stimulus to my SoC after the test program write the gpio control register. Here comes the question !

How could I know when does the test program write the gpio control register ? How could I synchronize software and hardware ?

thanks
 

normally , the c code should be compiled to boot rom in flash or ddr, then arm load program from flash or ddr to execute them!
 

sorry for my poor expression.
My question is on how to talk to the testbench from a program that is running on a simulated CPU. Like when you want to test your GPIO pins, you might want control the external stimulus on the pin from within the program.

thanks
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top