ESD active shunt question

I have a few ESD network architectures' related questions (active shunt).

I have come across a few so far:
i) With the trigger block activated by steering some of the discharge current to a
separate boost bus as opposed to using the Vcc bus directly.
What is the advantage of one vs the other?

ii) discharge current steered to a separate ESD bus as opposed to the Vcc bus
what is the advantage of one vs the other?

Would appreciate any light anyone can shed on thes topics.

Hi manjula

1. Boost bus: Principle is to be able to use a higher gate bias at the NMOS power clamp to enhance the current capabilities of this NMOS transistor. There is a landmark paper on this approach by the people (Michael Stockinger et al.) from Motorola (now Freescale): "Boosted and Distributed Rail Clamp Networks for ESD Protection in Advanced CMOS Technologies", published at the EOS/ESD symposium in 2003. You should be able to find the paper in the IEEE database.

2. If you would tie the diode from pad directly to Vdd then the IO signal voltage is maximum Vdd+~0.3V. For some applications people want to be able to bring the IO voltage above the Vdd potential for different reasons:
- Vdd supply can be put to 'sleep mode';
- 'Hot-swap' application where the power up of the Vdd line takes longer to reach its full voltage while the IO pads can already receive full swing signals;
- 'Open-drain' applications where the system supply voltage is above the IC supply voltage: e.g. a 90nm 3.3V IC used in a 5V system.; ...

For all these applications design engineers need a special ESD approach. Some will use a local clamp at the IO. Other want to re-use the dual diode - bigfet approach.
A separate bus is then used, parallel with the Vdd bus where all the diodes (diode up) are tied to.

Please note that you cannot copy ideas/schematics from papers for your own commercial IC's without obtaining a relevant license from the IP owner!

Hope this shed some light??

ES

ES,
Thank you for the response.
Makes a lot of sense.
MR