Tutorials/info about FGPA with ADC Application

FGPA Applicaiton??

Well im developing a board with a adc that is gathering data and spitting it out serially. It has been suggested to me that i should use a fpga to clock the serial data out via a sclk and data out, and then buffer it and average the data using a rolling filter and then spit the averaged data out to a data and address bus to the main micro.

If you understand the above is something like this possible with an FPGA? and if so where an earth do i start, i sort of understand what an FPGA is and how it works but can find anywhere that will help me translate it.

Tried xilinx.com but was mostly gibberish to me lol

Cheers

Re: FGPA Applicaiton??

You have got a long way to go

THere are good FPGA tutorials and HDL guides out there. Look for example the following links:

http://www.fpga4fun.com
**broken link removed**
http://www.aldec.com/Downloads/
http://www.doulos.com/knowhow/

Re: FGPA Applicaiton??

The need for an PLD (FPGA or CPLD) depends on some parameters IMHO.
Speed, databus width, pre-processing need, etc.
There are also ADCs with a serial output (mostly used in audio range).
If you have a high speed ADC (>100MSPS) you will have a lot of problems getting the data from that ADC to the µP or µC. DSP alikes have better capabilities to process these streams of data.
If you want a digital filter in front of your DSP/µP, and a serial output, there is currently only one option FPGA + SerDes (whether or not integrated). A, X and L have products in this area. (Stratix, Virtex2, XPGA).
Some of the ADCs are only capable of presenting the data (full rate) in differential mode (LVDS, ECL). Again, then you will require so glue to pre-process.

Hope this helps