Zero of a common source amplifier

Hi,

I have a common source amp, with a pmos diode load. According to analysis zero should be at gm of input_transistor/cgd of input_transistor.

If cgd=cgdo*w; where cgdo=3.1500E-10 (from model file) and w=1u, cgd = 0.315 fF and if gm=97.7e-6, Zero should at 310.19 G rad/sec

But the star-hspice pz analysis shows a zero at 45.7 G rad/sec. I am not able to figure out the reason behind this difference. Can anybody please helpme with this.


Thanks and Regards
Bhat

The descprepancy might originate from your hand calculation is not accurate enough: the Cgd of the input transistor is not easily calculated by hand. You should rely on the simulator to give you more precise number.

A sanity check also reveals that the zero can not be at over 100GHz frequency. 40~50 GHz is a more reasonable number.

Willy

Thanks for the response.

This the output list file content about the transistors from HSPICE.

element Pmos_Load Nmos_Input
model p19 n19
id -28.7034u 28.7034u
ibs 1.671e-21 -2.229e-21
ibd 1.231e-16 -1.141e-16
vgs -1.7123 1.0000
vds -1.7123 1.5877
vbs 0. 0.
vth -482.9665m 469.3412m
vdsat -1.1355 455.6712m
beta 40.2157u 229.3438u
gam eff 509.2080m 493.4566m
gm 39.3180u 97.6980u
gds 705.8157n 1.1831u
gmb 11.1721u 21.1223u
cdtot 1.2067f 1.1059f
cgtot 5.6512f 6.0170f
cstot 5.5097f 5.0799f
cbtot 4.3210f 3.5903f
cgs 5.0922f 5.3761f
cgd 2.220e-16 3.018e-16

As we can see the cgd value is approximately same as we have calculated(3.15e-16).

Regards
Bhat

just as a guess, I notice that what you calculate is 310G rad/s and what it tells you is 45 G rad/s. Is it possible that these are not the correct units, i.e. if you divide 310G rad/s by 2*pi you get... 49.3 G Hz/s. Could this be the problem? either way, good luck.

Hi electronlover,

This is the pole-zero analysis result:


poles (rad/sec) -7.2394g (real) 0(imag).

poles ( hertz) -1.1522g(real) 0(imag)


zeros (rad/sec) 45.6847g(real) 0(imag)

zeros ( hertz) 7.2710g(real) 0(imag)


According to my understanding unit wise there is no problem. I dont have any problem with poles. My calculations and results are matching.

Any other guess??? :- )

As far I know:
U will hav a zero in the circuit if there are two paths from input to output in ur stage.
Can anyone tell me y we r getting zero here..

Since you have two impedance paths from input and outputs, there is certain frequency that the signals from two paths cancel each others, thus we have zero outputs and produce a zero at that frequency.