Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

a question on pll , need help

Status
Not open for further replies.
X

xihuwang

Member level 2
Joined
Oct 23, 2007
Messages
46
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Activity points
1,595
Hi, every one :

Could any one tell me how to set the cap value of Cp2 and Cn ?

And my ohter question is :why the Vctrl is refer to VCC , but not to gnd ?
For my pmos vt is greater than nmos's , this maybe result in small dynamic
range for vctrl .
The ckt is in the below file
 

Vbp follows Vctrl, then both of them reference to VCC, right?
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top