Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

cadence simulation - transistor M#: 'Cdsc' is negative

Status
Not open for further replies.

toldo83

Newbie level 5
Joined
Jun 9, 2009
Messages
9
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,346
cadence simulation

How is it possible to solve this warning:

transistor M#: 'Cdsc' is negative
 

cadence simulation

Could you give more details? What are you designing? and what simulation are you running?
 

Re: cadence simulation

A rectifier (more precisely a doubler circuit) using UMC 0.18um technology. I have my RF port source then a capacitor with a shunt transistor followed by a series transistor and a shunt capacitor. Transistors are low Vt (3.3V version), and the input source is set at 1MHz, with an amplitude of 1Vpp. Transistor number of fingers is 17 and caps are 500pF.
I am performing a transient analysis as well as DC analysis.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top