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How to divide the big transisitor in layout using cadence?

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sunli567

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to split transistor into layout candence

I am doing layout using cadence lately.
As some transisitors in schematic are too large, I want to split one transistor into 4 or 5 pieces, not fold.
Does anybody know how to do this or provide some related tutorial files?
I searched a lot in google, but did not find something.
Thanks!:D
 

try to use smaller parallel transistors instead of one big. you can do it by using fingers width.
 

Re: How to divide the big transisitor in layout using cadenc

when i do the layout, it always gives following error.
"Assigned value for 'sdMtlWidth' is too small; value is overridden"
what is "sdMtWidth"? Please help me.
thanks
 

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