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two source clock in DFT mode

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hfooo1

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can you explain why to adopt two source clock and how?
i only heard about this,and not suffer such situation.
 

using multiplexer selected by test_mode, the two clock domain will be merged.
 

thank you for your reply.
but i mean using both two clocks in one chain.
i ask for the detail.
 

hfooo1 said:
thank you for your reply.
but i mean using both two clocks in one chain.
i ask for the detail.
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Only one clock can be triggered at one time or you will have problems.

I suppose you are talking these two clocks will be used in different modes, such as function mode, scan mode and BIST mode, etc..
 

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