m.zihanul
Newbie level 5
hi all..
i've written a VHDL code for QPSK modulator but there seem a little part that i dont know how to debug it. i cant enable to write the input into RAM. the things is i separate the input to inphase and quadrature and want to store it into two RAM. could anyone help me ?. here i attach the top level design, 2 ram and two LUT. i dont know whether it will come out the correct modulation or not cause i cant see the output yet. please help me.
thanks in advance.
i've written a VHDL code for QPSK modulator but there seem a little part that i dont know how to debug it. i cant enable to write the input into RAM. the things is i separate the input to inphase and quadrature and want to store it into two RAM. could anyone help me ?. here i attach the top level design, 2 ram and two LUT. i dont know whether it will come out the correct modulation or not cause i cant see the output yet. please help me.
thanks in advance.