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General Discussion about ASIC flow Spec to GDS to foundry

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gbaerf

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Hi ASIC & SOC designers,

I need a clarity on complete spec to final silicon to customers :- Please comment

1.) First any company will qualify the project / economic and benefit of doing and all.

2.) Customer Specs and Customer design

3.) CPU design and DSP core design

4.) deciding on I/O cells and bus architecture

then it come digital part and analog part

5.) Specs

6.) RTL

7.) Gate level

Here We do FPGA validation and prototyping 0n 5 , 6 and 7th steps

8.) Phisical layout


9.) Mask

10.) Fabrication

11.) Assembly and testing

In 9 , 10 and 11 we do manufacturing solutions with semicondustor foundries.

Pls go through the above and give ur comments what else can be added ???

With Regards,
 

Re: General Discussion about ASIC flow Spec to GDS to foundr

it may be

Specs
behavioural simulations
FPGA
RTL
Physical synthsis
Physical design
.......

makes sense

__sree
 

Re: General Discussion about ASIC flow Spec to GDS to foundr

Yes you are right on spot. Just do not forget the computer architecture design part.
 

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