[GIFT=120 pts]VCO Design Help

process independent vco

Hi All,
I need your help to understand the thesory behind the design of VCO for a specific chosen central frequency. My problem is when I design a VCO I can determine it's frequency only after simulation. After that I do random transistor sizing till I get the wanted central frequency.
I know that this is a bad design flow. I have no choice.
I'm convinced that there is a theories and techniques to calculate the differents VCO's delay cell sizing based on current, voltage and number of delays cell.
I know it is a matter of delay cell sizing after having fixed the number of of delay cell in the VCO and also knowing the current and the voltage to use.
let Say I need a 4 stage delay cell VCO,= 2.5 V and I=0.2µA

How to calculate the Delay cell.

Please refer me to papers/books/websites to study this issue.

I'll distribute all points for helpers.


Thanks in advance.

design of delay cell in vco

Check this:
http://analog.postech.ac.kr/3.Class/1.Classes/08_695v/08_695v.htm

differential delay cell calculations

Any other help ?

120pts

Check this document from MIT:

number delay stages vco

Obviously the calculations are going to depend on the topology of your VCO's cell. One of the most common topologies is the differential delay cell, if you are using this one the best place you can go for info is to its creator's papers:

"Low-jitter process-independent DLL and PLL based on self-biased techniques" by J. Maneatis

"Precise delay generation using coupled oscillators" by J. Maneatis

Now, for the basic "Current-starved Inverter Oscillator" you should go to the book "CMOS Circuit Design, Layout, and Simulation" (By Baker); you can find it in chapter 19 (Digital PLLs) section 19.2 (Voltage controlled oscillators). There you can see that the frequency is directly proportional to the current across the stages, which can be linearly controlled with the bias stage also explained there.

Hope this helps,

diemilio

delay cell vco

I just remembered that "Design of Analog CMOS Integrated Circuits" by Razavi has a whole chapter on oscillators. He describes a bunch of topologies and derives the delay expression for each one of them. I think is chapter 14

Regards,

diemilio