Question about folded cascode

I wanted to design folded cascode opamp in picture...
I have used allen's book: with his method i obtain a great gain, but a very bad offset. To reduce offset usually i reduce W of cascode load (L is fixed in my project), but Voutmin is also reduced...how can i obtain the same gain with little offset?
I've found that if W7 is greater than W6, offset is greatly reduced, but i'm not really sure that is a correct way to resolve this problem: this method is correct or not? Why?
Thanks for the help

My guess is that you are running into problems with M3 & M4 going into linear region rather than saturation, starving the current out of the folded stage. You can check this by verifying the current levels in each leg of the amplifier.

There are a couple of things you could do to prevent this:
1- Make M15 longer channel length with very narrow width and make M6 and M7 wide channel width with short channel length. The aspect ratio (W/L) of M15 must be smaller than (1.5*W6*W3) / (L6*W3 + 1.5*W6*L3) in order for this to work properly.
2- Add voltage drop at the source of M15. This could be a resistor, diode or a diode connected MOS. This would allow you to avoid the rule in option #1. This will decrease the common mode voltage level of the amplifier (M7 would go linear at a voltage farther from your +3V positive supply.) by approximately the same amount as the voltage drop. With supplies of +3V and -3V, you might have sufficient headroom to do this without too much problems.
3- Increase the current in M15. This is wastefull of the current, but if you do not care about power consumption, it might be an easy fix.

This is my circuit: i have used ideal voltage sources instead current mirrors to reduce problems...My circuit satisfy all requirements except the great offset voltage (this is represented in picture). In saturation.jpg i have rapresented Vsd-Vsg+|Vp| of Q5 and Q7: so when this value is greater than zero, transistor is in saturation region.
Vbias2 is obtained from condition on Voutmax: when Vout=Voutmax(=1.7V) Q5 and Q7 are in saturation region and have the same Vsd (it is equal to intersection point in picture saturation.jpg). Q5 is in saturation region for a greater range then Q7, so i don't think that is the problem (i am new in this field, so i'm not totally sure).
If Is5 increases, gain became smaller
If Vbias2 decreases, offset change slowly but Voutmax is greatly reduced
If W of cascode load is reduced, offset is reduced but Voutmin also
As i have said, the only way to obtain good results is W7 greater than W6, but i'm not totally sure on this solution...can you help me?
Thanks for the help