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I2C level riggering problem!!!

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Mkanimozhi

Mkanimozhi

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riggering

Hi,
This is my I2C interface code for TMP100, i know it's having lot's of mistakes, i have desined using edge triggering and how to write code for edge triggering and shall i make scl signal is input r output, and shall i design my code by all fpga clk level trigger or scl cclock level trigger, how write the code for level triggering.if some one having completed code for i2c with eprom r some other interface , please post here.thanks in advance


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kanimozhi.m
 

i2c level trigger

TMP100 is an I2C Slave. Typically, the clock and data lines are operated as open drain with pullup resistors. This allows either device, master or slave to pull the lines low, and allows the logic high voltage to be controlled. Look at the following link for some I2C basic stuff.

https://www.fpga4fun.com/I2C.html
 

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