M.Arulvani
Newbie level 3
Hi
I have designed a 8 bit register file using 6T SRAM cell in cadence spectre. I want to evaluate the leakage power for this circuit. can anyone tell how to resolve this problem
I have designed a 8 bit register file using 6T SRAM cell in cadence spectre. I want to evaluate the leakage power for this circuit. can anyone tell how to resolve this problem