Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Filter design for SMPS - high noiseat output

Status
Not open for further replies.

saurav_sdpl

Full Member level 3
Joined
Sep 29, 2006
Messages
185
Helped
4
Reputation
8
Reaction score
2
Trophy points
1,298
Activity points
2,522
Filter design

I have designed a flyback smps with 1W output power 5V@1A
When i am applying a load of 250mA , it is generating high frequency noise of abt 200mV peak at 5V output.

I have used 10nF, 100nF ceramic capacitors at output but of no use.

How can i reduce the noise.
Also my transformer makes lot of noise, my feedback loop incorporates 1nF capacitor , has this something to do with loop stability.

Please suggest
 

Filter design

thats 4% ripple so not much good.

what frequency is the ripple?

how much caps have you put on the output?

have you allowed for the ripple current in the cap decision?

have you varnished your flyback core and windings to stop them buzzing.....they all buzz if not varnished......just use tape for quick do it.

what is esr of your output caps?

what does it do with no feedback components ?(oviously you need the divider feedback voltage)

is it continuous or discontinuous?

did you use slope compensation?
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top