voltage mode smps for good EMC

emc smps step up converter

Hello,
I was reading the following article (below) which states in the first paragraph that

"Current-mode control is the best way to control converters, and is used by
most power supply designers"

**broken link removed**

....this seems like a sweeping generalisation to me, and i am told to design an smps using current mode...however, i feel that voltage mode is just as good.

Current mode can indeed have better transient response, however, current mode tends more readily toward on-off control than voltage mode, and therefore voltage mode is best for EMC, since the pulse widths will vary more smoothly over time in voltage mode, as the load changes transiently.

Current mode also requires slope compensation, this means that the current ramp hits the threshold quicker and shuts off the switch -sometimes too quickly.....this means that you cannot "work the ferrite" as fully as you can with voltage mode, since if you design so that the current ramp hits the threshold at the ferrite saturation current level, -and doos this at the end of the maximum available on-time, then with the added slope compensation, the switch will turn off sooner, meaning you have not been able to fully allow the current to rise, and therefore not as much energy has been passed through.

Does any other reader have reasons that current mode realy is the best?

smps conducted emissions solutions

Voltage mode can yield okay converters, however they are prone to break down. This is due to there is noting to restrict the current from incinerating the switching elements during overloads or faults.
This is the sole reason for going current mode. Sure the response usually can be a little better, the control loop compensation is also easier to get right, however the single largest benefit is ruggedness towards faults.

Looking towards EMC there is absolutely no benefit from voltage mode over current mode control. None. Your theory of the smooth changing PWM values have no effect on the EMC. It is the simple fact that you have large di/dt's and dv/dt's during switching a transistor on or off that causes converter designers everywhere headaches.

Third: Your postulate of slope compensation eating into the ferrite's b-h curve is ludicrous.
Yes an instantaneous step up in required load current will (during a single switching period) cause the current level signal to hit the cut off point to early. However, the loop regulation will compensate for this entirely in a matter of 4 to 20 switching cycles, depending on the aggressiveness of the control loop. Despite this apparently shortcoming the responsiveness of the current mode control the voltage mode control this is still a good deal poorer in this respect. As you correctly point out, the current mode control can be made to have a better transient performance all things being equal.

In so many words, current mode control is the way to go if protection against low impedance power sources is needed, such as the utility power grid or large battery configurations.

As always, there are exceptions to the rule. But as the article you are referring to points out, current mode is the most widely used topology for the above reasons.


/Ghydda

smps emc

Hello, I thank you for reply and also to say the following:-

I agree that the fast switching edges are a problem.....however, the frequencies in the edge is basically from 1/(2*rise_time) upwards and as far as conducted emissions go, they are easily filtered out with an EMI filter.....just make it cut off low enough to give sufficient attenuation to these frequencies.

I still say my point that the edge is not everything.......it is the pattern of the pulse width changes and the subharmonic frequencies that arise from this that give the biggest problem....because these subharmonic frequencies can be at a frequency that is well lower than your EMC filter's corner frequency and can avoid sufficient attenuation..failing the EMC test.

with reference to this.....the following article is of interest

http://www.onsemi.com/pub_link/Collateral/AND8182-D.PDF

.....on first page , top right paragraph you can see it refer to EMC filtering being made easier by the switching frequencies being kept from varting too much...

similarly.......

http://www.powerint.com/sites/default/files/product-docs/lnk302_304-306.pdf

this datasheet (first page) says the following...

"Frequency jittering dramatically reduces EMI (~10 dB)
– minimizes EMI filter cost"

.....this again indicates to us that it is not just the edges that cause the EMC problem....it is the pattern of the frequencies too.....

Incidentally...the LNK series PWM controllers are on/off controllers, and require no compensation.......however, they are not used at high power since there erratically varying switching frequency causes EMC problems....since the way that the pulses go on and off...can give rise to overall low frequency harmonics....which are much lower than the EMC filter's corner frequency and can get tthrough this filter.

The following is an exerpt from the book "demystifying switching power supplies" by Ray Mack......page 23 gives the following......

"“The simplest form of control circuit is variable frequency/constant on-time or Pulse Frequency Modulation (PFM). In figure 2-1, the oscillator has a constant on-time (basically a one shot multivibrator similar to a 555 timer). As soon as the control voltage drops below the reference, the oscillator is triggered to turn on by the comparator. Under light loads, the frequency is low and the duty cycle is low. As the load increases, the frequency increases, The maximum frequency occurs at 50% duty cycle. The wide range of ripple frequency can cause problems for electromagnetic compatibility (EMC) and for ripple control on the output. The Texas instruments TL-497 is a popular commercial example of this type of circuit.

EMC and ripple control are much more predictable and controllable if a constant frequency is used and the width of the pulse is varied. Pulse width modulation (PWM) uses a constant frequency and varies the on-time of the switch.”"

......As we may see.......it is not just the edges that cause our EMC problem.

I have seen and am still back looking for the article which i read that told that good EMC performance can be gotten at the expense of transient response.

...If the adjacent pulses vary their width gradually and smoothly, then this gives rise to less severe subharmonic oscillation...making for better EMC performance......though good transient response may well want us to change the pulse widths greatly from pulse to adjacent pulse.

As for slope compensation, if you add a slope to the current ramp, then you will hit the threshold sooner as you say also.......and thus your current will not be able to rise up as far as it otherwise would. This i believe can be a problem of itself, since your current will never be able to rise to the maximum level that it should be allowed to (just below saturation level). In other words, we are not "working the ferrite" to the limit......we are never making use of the available possible current rise.

voltage mode pwm theory

It is true that having a fast changing load pattern into the kiloherz range can produce sub-switchfrequency-harmonics for which the EMI-filter may not be designed to dampen.
But surely that would be defined in the requirement specification for a power supply if this must be handled?

I have never experienced this to be a problem though. I am not saying it does not exist.
I suppose one application where this is most likely to exist would be in a micro processor supply - software running in a pattern causing more or less predictable power load patterns.

If during a design it is chosen to use this slow-changing PWM-technique then I must presume there would have to be some kind of energy storage for which this sudden increase or decrease of power output can be drained/stored to allow the slow ramping of the input power.

It all boils down to whether you want to put the components/cost into the EMI-filter or to the energy storage facility. I suspect there is no major advantage in either solution to make it obvious which to select.

Cheers,
/Ghydda