Why IIL family is not used

IIL family has following characterstics :
1. low power dissipation
2. low speed power product
3. Highest packing denstiy (even greater than MOS)
4. no spikes as in case of TTL family

disadvantage:
very close logic levels ( logic 0 =0.2 V , logic 1 = 0.7 V) but they have high noise immunity as they operate of current and not voltage.

also explain why noise effect voltage and not current

Noise does affect current. Depending on the rest of the circuit, this current may, or may not, lead to a significant voltage change.

Let's look at the three basic mechanisms involved in noise as it occurs in ICs:

(a) Capacitive coupling between signal wires:
This is the dominant noise effect on modern ICs. Due to their proximity, two adjacent wires form a parasitic capacitor (electric field coupling). When the voltage goes up on one side of a capacitor it generates a current on the opposite plate by repelling or attracting charge carriers. So it generates a current. But in a MOS circuit that current doesn't really have anywhere to go because the load is a gate capacitance. The net effect is to cause a matching voltage spike on the victim net. All this is further complicated by the Miller Effect, but it doesn't change the basic idea. In a TTL circuit, that current could flow into the gate and would not have as much effect on the voltage of the victim net. Even in a MOS circuit, you will find that a wire with a strong driver is less susceptible to noise than one with a weak driver. The reason, of course, is that the current from the strong driver dominates the weak noise signal, but a weak driver will feel the noise signal more strongly.

(b) Inductive coupling between wires:
This only starts to become an issue for ICs at around 2GHz and is not significant until about 5 GHz. It is routinely exploited through inductor coils in RF circuits at 10GHz and above. Inductive coupling works through magnetic field coupling and explicitly induces a current in the victim net, no matter what the voltage needs to be to support this current. It is not really an issue for commercial ASICs, but this noise effect is, once again, current based.

(c) Substrate noise:
This is a quite complicated subject and not something digital designers concern themselves with. Suffice it to say that this effect occurs when transistors inject current into the silicon substrate which then propagates through the bulk material to surrounding transistors. Again, a current-based noise effect.

Conclusion:
Yes, in digital MOS circuits the effect of capacitive noise is to cause a voltage fluctuation at the gate load of the victim net, but that does not mean that the noise mechanism is a purely voltage effect.

but in analog design ,the case in more difficult to have an analysis!

thanks for info. but my ques stands unanswered - why IIL family is not used