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About CMOS signal path

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Advark

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How differente can be the operation of a circuit that the signal path consist only of NMOS transistor than a traditinal CMOS signal path.

I mean the frequency response of the circuit, i know that NMOS gm and carrier mobility it's three or four times than PMOS, but someone can give me a more detail explanation
 

for a certain bias current and to have a certain
(vgs-vt) PMOS transistor width should be more than
3 times NMOS that causes 3 times more parasitic
capacitance
 

Advark said:
How differente can be the operation of a circuit that the signal path consist only of NMOS transistor than a traditinal CMOS signal path.

I mean the frequency response of the circuit, i know that NMOS gm and carrier mobility it's three or four times than PMOS, but someone can give me a more detail explanation

If you mean the high frenquency circuit, the parasitic is important. But, for low frequency circuit, the difference is small. And some time CMOS have larger linearity than only NMOS, so we like to use CMOS.

Besides, PMOS is better for noise and matching. So it will be important if you care noise performance.
 

Perhaps you could explain me this extract :

The signal path consists of NMOS transistors only, whose carrier mobility and gm in submicron technologies are three to four time that PMOS devices. Therefore, the circuit can operate at a higher frequency than those built on a CMOS signal path.

This extract was taken from the paper in :
 

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