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A question about miller compensation and strage zero

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hoolish

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Hi,
I have a question about miller compensation.
I design a amplifier with first stage differential input,
differential output, second stage differential input, single
output. I put a miller cap between second stage output
and one first stage output.
From the AC simulation, I find a strange zero in the loop
whose frequency is less than unit gain frequency.
I can not explain the reason because it is not the left
hand zero caused by miller compensation.
Anybody can help me to explain the wired zero?

Thanks!
 

It is possible to have a zero frequency (gm2/CC) smaller than UGW(gm2/CLoad) if your value of Cload is too samll and CC is too large. However, it is bizard to have a RHS zero.
 

My Cload is 1000X large than Cc.
So I do not think it is due to the gm2/Cc.
 

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