Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Interfacing Matlab model with Verilog

Status
Not open for further replies.
R

r_p_sanna

Member level 3
Joined
Oct 18, 2004
Messages
65
Helped
6
Reputation
12
Reaction score
5
Trophy points
1,288
Activity points
569
Any body help me out how to interface matlab model in Verilog.
The objective is like I have a matlab model which gets the input from the verilog and generates output. Verilog needs to use the Matlab output for further processing.
 

To do this you need to have Xilinx ISE in your computer. When you install it, in your MATLAB Simulink library the Xilinx files will appear. Then in Xilinx Blockset/Basic Elements there is components named "Black Box". When you drag this components to your simulink project It asks you about the verilog file for that. For your verilog file there are some simples rules should be complied like defining of two fixed pins for clock anc clock anable and having all pins lower case. It is better to see its help.
good luck.
 

Related to this topic, I was wondering if any of you have examples of electrical circuits that have been described in Simulink. I too am trying this sort of thing, but all the examples I have are of things like "air conditioners" or "biomedical applications" rather than *circuits*. Is there a general library that I could take a look at to try in our design flow?

thanks
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top