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Trying to fan out a signal, but it isn't happening!!!

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korgull

korgull

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ok.. I'm missing something here.. What I would like to do is make a serial in register that exports parallel data (it can come out staggered). I would also like Q[1075] fanned out. So, I should have a signal Q[1075] and also a signal SHIFT_OUT. In simulation, everything is fine. However, when I synthesize it, I do not get Q[1075] I get SHIFT_OUT, but no Q[1075]. Anybody have a clue as to what I am doing wrong. My synthesizer is Cadence RTL Compiler.

thanks

Code: 
module t5_shift_register_1076B(SHIFT_IN, SHIFT_OUT, SHIFT_CLK, Q);

input SHIFT_IN, SHIFT_CLK;
output SHIFT_OUT;
output [1075:0] Q;
wire SHIFT_OUT;
reg [1075:0] QINT;

	assign SHIFT_OUT = QINT[1075];
	assign Q[1075:0] = QINT[1075:0];

	always @( posedge SHIFT_CLK )
		begin
			QINT <= {QINT[1074:0], SHIFT_IN};
		end

endmodule
 

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