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Syntax Error when using spectre to simulation verilog-A file

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Julian18

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Hi, there
I am very new to verilog-A field, so bear this simple question. I am runing Ken's sample and hold example and got the error like below:
Error found by spectre during AHDL read-in.
"sh.va", line 5: "'<<--? include "discipline.h""
"sh.va", line 5: Error: syntax error
"sh.va", line 11: "electrical Pin,<<--? Nin, Pout, Nout;"
"sh.va", line 11: Error: syntax error


I am just using the spectre from command line(instead of simulating in ADE) and the command is

spectre s_and_hold.scs


I wonder if I have to add some options in order for spectre to realize that the file contains verilog-A statements.

TIA.
 

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