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- 24th June 2008, 03:17 #1
## kt/c noise

Dear Friends

I would be grateful if someone could explain the KT/C noise (input referred) contribution of Sampling Capacitor (CS) and feedback capacitor (CF) for the standard two capacitor S/H implementation (not the flip around architecture).

Regards

Sachin

- 24th June 2008, 03:17

- 24th June 2008, 22:15 #2

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## sample and hold circuit

I did not remake the derivation but the path is the following:

Have a RC low pass filter. The R is the noise source with 4kT*R. The RC filters so that the power noise density get filtered by 1/(1+omega^2). If you integrate that up to infinity over frequency you get the expression above.

- 24th June 2008, 22:36 #3

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## ktc noise

Maybe this will help.

2 members found this post helpful.

- 24th June 2008, 22:36

- 25th June 2008, 02:42 #4

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## switched capacitor noise

the noise contribution from the sampling capacitor is 2*k*T/Cs, where two times are from sampling phase and integrating phase. the noise contribution from feedback capacitor is 2*k*T*Cf/Cs² due to capacitance divider.

- 25th June 2008, 07:07 #5
## sample and hold capacitor

Thank you for your comments.

Dear Jiangxb

I have an amplifier circuit. It is not an integrator. In phase 1, the capacitor CS samples the input via a switch. In phase 2, the charge is transfered to another capacitor CF (feedback capacitor). This capacitor, along with the op-amp, hold the charge.

Please have a look at the image and suggest your views on the KT/C noise.

Looking forward to hear from you.

Regards

Sachin

- 25th June 2008, 07:07

- 25th June 2008, 07:32 #6

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## kt c noise

well, the noise contribution only comes from the switches connected with the sampling capacitor Cs, it's 2*k*T/Cs.

- 25th June 2008, 09:01 #7
## flipāaround sampleāandāhold

Dear JiangXB

Thanks for your response. I agree with you that the KT/C noise should equal "KT/Cs".

I am slightly confused about the KT/C noise presented in the following document (page 242). Please note that this is a different SH architecture (flip-around).

http://kabuki.eecs.berkeley.edu/~cli...sis/thesis.pdf

The figure referred to in this analysis is as below:

If time permits, please have a look and let me know the reason of including CGS (parasitic gate to source capacitance of the op-amp input transistors) in noise calculation.

Thanks for your time

Regards

Sachin

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