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Circuit Envelope Simulation in @DS???

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I could't understand the Circuit Envelope Simulation in @DS:

1. Is it equal "transient simulation" plus "frequency analyse"?

2. when i should carry out an Circuit Envelope Simulation?

3. Circuit Envelope Simulation is often used in PA, PLL, GSM System simulation, Why???
 

Envelope simulation is used when you want to look at a low frequency signal that is modulated on a high frequency signal. If you use transient simulation on a 1GHz RF signal with 1kHz modulation, you would need very many small time steps to recover the low frequency modulation and it would take a long time. In envelope simulation, you don't sample the RF carrier signal directly but the envelope of the RF carrier to recover the modulation. Its almost like running a transient simulation on the 1kHz directly, which is much faster.
 

Yeah, if you are familiar with harmonic balance theory, envelope simulation principles are the analogous - like having harmonic balance with time varying coefitients - this time variations corresponds to the LF modulation of a HF carrier. It is a kind of generalization of HB simulations. I tried to run one in ADS, it was an awfull experience. If you don't know exactly what you are doing do'nt do it! There are a number of options that can influence your results significantly, you have to have theoretical background on this and this is quite a long story.

FlyHigh
 

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