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Transistors in an Integrator

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taik

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Hello all, I have a very basic question here for Integrator design. I am not too sure and hope someone can confirm.

I am currently using a PMOS Diff-Amp to implement an Integrator as shown below.

integrator.gif


Question:

Should all transistors be in Saturation region when they are DC biased? (In the first place, am I right both input is zero? If so, that means the DC bias is 0v?)
 

Normally the input differencial transisters should be biased at half VCC.
All the transisters should work in saturation region.
 

pardon me if i sound stupid...

how do I bias at vcc/2 when it is grounded at the positive input?
 

the ground is an AC ground not a real ground
 

tat would make sense if it's AC gnd...

gosh... my foundation is very bad...

:cry:
 

taik said:
Hello all, I have a very basic question here for Integrator design. I am not too sure and hope someone can confirm.

I am currently using a PMOS Diff-Amp to implement an Integrator as shown below.

integrator.gif


Question:

Should all transistors be in Saturation region when they are DC biased? (In the first place, am I right both input is zero? If so, that means the DC bias is 0v?)
Click to expand...

HI
guys
i 'm confused of the offset voltage(Vos) of a time continous intergrator.
IF i'm wrong ,plz correct me!
/ if there is a nonzero Vos in the input teminal of an intergrator , it will be intergrated to high and high , till to saturation (the output will fix at VDD or GND), and the Vos is always exits in pratical CKT, how the intergrator works ??
:cry:
PLZ point out where am i wrong!
Thanks
 

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