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reg: Clock Tree synthesis

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jyothia

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clock tree synthesis inverted clock

Hi,

Query1:
I have done CTS and after that I have got two report one clock skew report and one timing report. Now there are some clock path group whose Global skew is bad and also I can also see timing violation for the same clock path group is quite high. So should I try to debug the timing report and try to see how can I minimize that violation which in turn will make my global skew better. Or I should debug in a different way.
Query2:
I have a scenario like this there are two FF: FF1 & FF2. FF1 has got CLK1 and FF2 has got clock !CLK1 (inverted clk). Now in the timing report I found that the tool has tried to balance the path of CLK1 only and not !CLK1. what can be the cause.

n.B. I'm using magma.
 

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