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I don't think the question was how to test a SERDES - for which jitter, speed and BER are all characteristics. The question was just about testing LVDS I/O, which case, the parameters to measure are voltage levels, leakage, and the relative timing of the two parts of the driver.
These are standard ATE tests. You have to pre-condition the chip to get the I/O's to toggle to the right state, and measure them. It's not all that easy to do in a lab, on the bench, at least automatically. You could run the chip and visually get the information on the bench - but like I said, usually done with ATE.
I think what U want to say is ATE can help to do it.
But I want to know that there are some topic from view of DFT, test circuit, TX link, RX link test. ATE can help for DC or AC character, but how about the function of this interface?
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