Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

slew propagation in cdb.

Status
Not open for further replies.

hrushitha

Member level 1
Joined
May 7, 2007
Messages
37
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,504
hi all,

how cdb creates the characterization table for slew propagation.

thanks
 

I don't know what cdb is, nor what the purpose of your question is, but slew-propagation tables are created through a library characterization process. This typically involves a lot of transistor-level simulations. Basically it models the gate in great detail and the submits many different input slews under different loading conditions to see what output slew results. Not something you do by hand.
 

we have slew info in .lib,but what is the special in the .cdb slew propagation.
how it differs from .lib slew.
i mean cdb contains propagated slew and arc current models.
my question is how make cdb generates this propagated slew.
i think now u can understand the purpose of my question

thanks
 

MarcS said:
I don't know what cdb is

cdb is the cadence database format. There is slew information in cell characterization of cdb libraries. I'm not sure how it works. See if you can glean anything from this sourcelink post:
Code:
questions on cdb noise library characterization

Error Message:
None

Problem statement:
For library modelling we are  trying to understand the details within the CDB noise library:

-vl_iv_curve -vh_iv_curve 
 -vl_iv_curve { { 1.2 1.08 0.96 0.84 0.72 0.6 } 
{ 0.05 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 } 
{ 2.869e-05 5.417e-05 9.634e-05 0.0001282 0.0001540 0.0001764 
           0.0001962 0.0002141 0.0002297 0.0002423 0.0002523 

1) Each output pin has a series of I and V (Ids and Vds curves) tables 
for a range of Vgs voltages. By default, Vgs varies from VDD to 0.5 VDD with 10% 
increments. 
Vds varies from 5% to 100% of the supply. 
   a) In my .cdB Vgs ranges from 1.2 to 0.6 and Vds ranges from 0.05 to 1V. 
      That suggests Vdd = 1.2V, supply =1.0V. Why is supply different than Vdd? 
        How did cdB get the value of 1.0V for supply?

     b) What is the current display in the table?  

     c) Vgs and Vds is of which part of the circuit? 
 
2) -vddres/-gndres How do we arrive at the holding strength of the output? 
    These values seems to be corresponding to the iv curve table 

3) -slews (in_slew1 in_slew2..) -rise_prop_to internal_node -Rise (prop_slew1
  prop_slew2..) -fall_prop_to internal node -Fall (prop_slew1 prop_slew2 .. ) 
 
The -slews values represent the input slew transitions (0-100% of the transition
time), and -Rise/-Fall options represent the rising or falling propagated slew that
corresponds to -rise_prop_to/-fall_prop_to internal nodes.
 
How do you measure Slew at the fall_prop_to internal node and rise_prop_to
internal node ?

Solution:
1) a)  The 1st list is the Vgs values in Volts. 
       The 2nd list is the Vds values as percentages of Vgs. 
   -vl_iv_curve { { vdd 0.9Vdd 0.8Vdd 0.7Vdd 0.6Vdd 0.5Vdd }           
                   { 5% 10% 20% 30% 40% 50% .... 100% } { Ids data } 

     b)  It is the current flowing is drawn from the output node. 
     c) Vgs = input voltage that applied to the transistor reference to ground. 
         Vds = output voltage 

2) This is a starting value for the base holding strength. It is not the final value 
   used inside CeltIC. The holding strength is the resistance of the weakest path to 
   VDD & the weakest path to GND.  vddres and gndres are not computed
   from the IV curve tables, but are computed independently.

3) The slews measured are the 20-80 by default. The internal CCC is loaded only
    by the final stage CCC. In case where the internal CCC is also connected to an
    output  (could happen in the Q, Qbar kind of outputs) then we add a set of loads
    at that output to find the slew propagation for those outputs.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top