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about writing dracula LVS rule question?

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shrbht

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we use dracula verify layout.
there is a question.
mix-signal chip has two gnd --------agnd dgnd, they are both connecting subsrate.

I give two substrate for nmos-------------- pwell , psub.
element MOS [N] ngate nsd pwell
element MOS [N] ngate nsd psub
or
element MOS [N] ngate1 nsd pwell
element MOS [N] ngate2 nsd psub


but it is not allowed two MOS [N] in dracula rule
How can I do ? thank u.
 

change N to other name.
 

Usually we use a dummy layer to separate the different ground problems.

Maybe you can try it.
 

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