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How to star a design about ASIC verification and DFT?

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LinXiaoling

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call for suggestion

I am a student in a university,majored in IC design.And my study is forcused on ASIC verification and DFT .For some particular reasons, I have to finish my design by self-learning.
Therefore, I need you some suggestions on how to start my design.(My lab owns the software resource based on Synopsys and Mentor.)I will be very appreciated for your suggestion.
Hope to communicate with you .
My E-mail: syalk1120@yahoo.com.cn
MSN:syalk@hotmail.com
 

Re: call for suggestion

To Start up with Design, you need RTL code for verification or DFT , since you cant design now. Get the free ip cores from Design reuse site or opencores.org site.

I am not sure about mentor suport .synopsys had excellent support for any design flow issues.Refere Solvnet for each basic queries before putting infront of them.

For ex DFT is your concern, Start synthesizing your modules with clock and replace with scannalbe Flops. write your own DFT specifications for the selected design. Insert dft into the design. Check the test coverage . use Tetramax. Read DFT tutorials on solvnet to get better understanding of the DFT tool.

Best of Luck.
SAM
 

call for suggestion

As per me! u can experiment with programmable Fifo design and verify it..
or u can select some protocol and model it...
 

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