- 19th February 2008, 16:01 #1

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## buck converter calculation

Dear all,

I have a problem in simulating DC/DC buck converter in Cadence/ADS.

After simulating the converter, the power at the switch node (bet. PMOS and NMOS) is not same to the power at the load (after inductor).

It looks like the inductor generating some power so that the efficiency is more than 100% in some case.

Could you please let me know what the problem is ?

- 19th February 2008, 16:01

- 19th February 2008, 17:15 #2
## buck converter

One possibility is the gate drive signal coupled to the power stage. This happens to the high side Ntype boost strap gate drive when you has damping resistor connected in between high side gate and source.

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- 19th February 2008, 17:15

- 20th February 2008, 01:47 #3

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## inductor power calculation switcher

The efficiency calculation includes the power consumption in the gate driver. This is really wierd phenomenan. Is there any other possibility for this?

- 20th February 2008, 01:47

- 7th September 2009, 14:14 #4

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## power calculation for dc power

Hi

how i can calculate efficiency of dc-dc converter using cadence?

by calculator or ocean script or pss analysis or what?????????

pllllllllz anyone help me

thanks in advance