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DFM rules at 45nm, 32nm & 22nm

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ajaytronic

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endcap 45nm

Hi all,

As on lower technology, dfm rules are compulsory to follow.
Cuold anybody share, what special dfm rules we have to follow at 45nm, 32nm & 22nm.


If anybody having some related document, pls share with us.

Thanks,
Ajaytronic
 

below are some DFM guidelines, I have followed for 65n and 45n

1>try to give more (diff poly & metal) enclosure over Contacts
2>try to keep metal line width and space more than min +10% to 15%
3>try to increase the field poly width more than min +10%
4>increase the poly end cap
5>increase the spacing btw poly and both related and non related diff
6>try to keep min 2 contacts and if number of contacts are more try to increase the space btw them applies to both diff and poly contacts.
7>try to keep at least 2 vias per connection.
 
Thanks ninge,

But these are very common rule which we usually follow in analog layout. Pls give some specfic rules at 22nm, 32nm & 45nm like:

1. Stack via not allowed.
2. OPC rules.
3. Orientation of all transistor sud be same throughout chip level.

Can anybody add some more rules???
 

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